Wireless Sensor Networks represent one of the most prominent technologies in recent years. In WSN node architectures, the increasing complexity and high number of intensive tasks of today’s higher-end applications limits the use of traditional ultra-low power microcontrollers having sufficient but limited computational capacity and low scalability. The high performance high capacity FPGA based WSN node architectures provide the advantages of the intrinsic acceleration due to hardware parallelism, the use of partial reconfiguration capabilities for changeable environments, as well as a careful power aware management techniques for energy savings. This paper analyses different research prototypes available on FPGA based Wireless Sensor Network nodes and gives an understanding in this technology.