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Implementation of super-resolution algorithm on FPGA
Published in IEEE
Super resolution technique gives an effective way to increase image resolution. Lower resolution is converted into higher resolution. By proposed super resolution algorithm, image is resolved sixteen times. This paper presents a FPGA (Field Programmable Gate Array) implementation of super resolution algorithm. FPGA is used because of its various advantages. In super resolution image size is increased by adopting information from input image itself. Using this algorithm image can be resolved up-to 2x, 4x, 8x and 16x.
About the journal
JournalData powered by Typeset2015 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2015
PublisherData powered by TypesetIEEE
Open AccessNo