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Implementing PSK and FSK Scheme in Zynq-7000 FPGA for SDR Applications
Published in Institute of Electrical and Electronics Engineers Inc.
Pages: 721 - 727
This paper presents a versatile approach to implement BPSK (Binary Phase Shift Keying), QPSK (Quadrature Phase Shift Keying), FSK (Frequency Shift Keying), QFSK (Quadrature Frequency Shift Keying), M-PSK (M-ary Phase Shift Keying) and M-FSK (M-ary Frequency Shift Keying) on a Zynq 7000 All Programmable SoC which can find application in SDR (Software Defined Radio). The designs are implemented using Verilog HDL (Hardware Description Language) and the tool used is Vivado IDE (Integrated Development Environment) 2017.4 by Xilinx. The system follows a modular approach to make the design easy to modify and reuse. The design approach followed is a top-down portraying the primary modules and then moving into details of each module implementation. The Sine wave is generated using a look-up-table and the phase or frequency values of the sine wave produced is dependent upon the modulating message bits. With symbol sample frequency selection input the design is able to switch the rate at which the input message symbols are sampled facilitating the design to switch between message symbol sampling rate on the fly. These features of the design can find potential applications in SDR (Software Defined Radio). © 2018 IEEE.